Implant Dose and Spike Anneal Temperature Relationships

摘要

The method of ion implantation and spike annealing for preparing shallow junctions suitable for the extension regions bridging the channel and source/drain contacts of CMOS transistors are studied by annealing blanket implants. Junction depths at a given sheet resistance for low energy B implants are minimized for the combination of a fast ramp with a sharp-spike anneal. This is shown to be physically based on activation energy phenomenology. The fraction of electrically activated B is insensitive to implant dose, unlike the case of transient enhanced diffusion. Arsenic implants show higher activation fraction than comparably annealed P implants, without the large transient enhanced diffusion which is attributed to P and Si-interstitial coupled diffusion. For targeted sheet resistance and junction depth, spiking temperature trends lower with implant dose, concomitant with decreasing fraction of activated dopant.