Structure synthesis of analog and mixed-signal circuits using partition techniques

摘要

This paper presents an automatic structure synthesis technique by partitioning of the analog and mixed-signal circuit models. It translates a behavioral-level analog description written in VHDL-AMS into a structure-level VHDL-AMS specification based on a set of behavioral analog primitives. It is one of the three techniques in our proposed hierarchical methodology for supporting high-level analog synthesis