首页> 外文会议>Proceedings EURO-DAC '95 : European design antomation conference with EURO-VHDL >System Modeling, Hardware-Software Codesign, and Mixed Modeling with Hardware Description Languages
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System Modeling, Hardware-Software Codesign, and Mixed Modeling with Hardware Description Languages

机译:系统建模,软硬件协同设计以及带有硬件描述语言的混合建模

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Hardware Description Languages (HDL) such as VHDL provide a powerful platform for modeling at different levels of abstraction. Hardware-software codesign provides the designer with a design environment in which the designer can make effective partitioning decisions, and concurrently consider developing hardware and software components of a system, selected for the best possible performance, within a set of performance and design constraints. This paper describes our work to use VHDL to build design libraries that support rapid prototyping and conceptual modeling as software components in a hardware-software codesign environment. These library components can be instantiated for rapid prototyping, simulation, performance analysis of the design in the software domain, and for hybrid modeling containing interpreted and uninterpreted components. This helps in creating an uniformly robust design environment using a single HDL that supports the entire design cycle.
机译:诸如VHDL之类的硬件描述语言(HDL)为在不同抽象级别进行建模提供了强大的平台。硬件-软件代码签名为设计人员提供了一个设计环境,在该环境中,设计人员可以做出有效的分区决策,并同时考虑开发系统的硬件和软件组件,这些组件应在一组性能和设计约束内选择以获得最佳性能。本文介绍了我们使用VHDL构建设计库的工作,这些库支持在硬件-软件代码签名环境中作为软件组件的快速原型制作和概念建模。可以实例化这些库组件,以便在软件领域快速进行原型设计,仿真,设计性能分析,以及用于包含已解释和未解释组件的混合建模。这有助于使用支持整个设计周期的单个HDL创建统一稳定的设计环境。

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