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Implementing of Neuro-Fuzzy System with High-Speed, Low-Power CMOS Circuits in Current-Mode

机译:电流模式下具有高速,低功耗CMOS电路的神经模糊系统的实现

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This paper presents a new general purpose neuro-fuzzy controller to realize adaptive-network-based fuzzy inference system (ANFIS) architecture. ANFIS which tunes the fuzzy inference system with a back propagation algorithm based on collection of input-output data makes fuzzy system to learn. To implementing this idea we propose several improved CMOS analog circuits, including Gaussian-like membership function circuit, minimization circuit, and a defuzziflcation circuit. A two-input/one-output neuro-fuzzy system composed of these circuits is implemented. The control surfaces of controller are obtained by using ANFIS training and simulation results of integrated circuits in less than 0.045mm~2 area in 0.35μm CMOS standard technology. Simulation results show that all the proposed circuits provide characteristics of high operation capacity, high speed, and simple structures. They are very suitable for rapid implementation of high-speed complex neuro-fuzzy system.
机译:本文提出了一种新的通用神经模糊控制器,以实现基于自适应网络的模糊推理系统(ANFIS)架构。 ANFIS通过基于输入输出数据的收集的反向传播算法对模糊推理系统进行调整,从而使模糊系统得以学习。为了实现这个想法,我们提出了几种改进的CMOS模拟电路,包括类高斯隶属函数电路,最小化电路和去模糊电路。实现了由这些电路组成的二输入一输出神经模糊系统。利用ANFIS训练和0.35μmCMOS标准技术中小于0.045mm〜2面积的集成电路仿真结果获得控制器的控制面。仿真结果表明,所提出的所有电路均具有高运算能力,高速度,结构简单的特点。它们非常适合快速实施高速复杂的神经模糊系统。

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