FPGA-based GPS controlled timing system with nanosecond accuracy and leap second support

摘要

This paper presents the design and implementation of the GCTS (GPS Controlled Timing System), a hardware module that addresses the high precision acquisition timing necessity of the Jicamarca Radio Observatory (JRO). It extracts UTC information from a Trimble GPS receiver. With this information it creates a clock with a precision based on the reference signal from the GPS receiver, making it possible to time an external excitation signal (e.g. the radar transmission pulse) assigning it a sub-microsecond timestamp. This timestamp is stored in a register map along with other configuration and operation registers that are accessed by a SPI interface. Through this map the user is able to customize the response of the system to leap seconds (typical of the UTC scale). Tests made together with JRO’s acquisition equipment validated the reliability and portability of the system on different platforms. The GCTS was developed on an FPGA device using VHDL under a structural design that enabled a modular organization of the almost twenty components comprised in the system. With two identical systems running at 60MHz on different boards, a 50ns accuracy and a SPI transfer rate as high as 15MHz were achieved. Even though the system was intended for radar applications, it can be used to mark any type of signal.