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High Performance Collective Communication-Aware 3D Network-on-Chip Architectures

机译:高性能集体通信信息感知3D网络片上架构

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3D Network-on-Chip (NoC) architectures are capable of achieving better performance and lower energy consumption compared to their planar counterparts. However, conventional 3D NoCs are not efficient in handling collective communication. Existing works mainly explore Path and Tree multicast distribution schemes for 3D NoCs. However, both these mechanisms involve high network latency and lack scalability. In this work, we propose a SMART (Single-cycle Multi-hop Asynchronous Repeated Traversal) 3D NoC architecture that is capable of achieving high-performance collective communication. The proposed High-Performance SMART (HP-SMART) 3D NoC achieves 65% and 31% latency improvements compared to the existing Path and Tree multicast-based 3D NoCs respectively. HP-SMART 3D NoC also achieves significant improvement in message latency compared to its 2D counterpart.
机译:3D网络上的芯片(NOC)架构能够实现更好的性能和较低的能耗与平面对应物相比。然而,传统的3D NOCs在处理集体通信方面是不有效的。现有作品主要探索3D NOCS的路径和树组播分配方案。但是,这两种机制都涉及高网络延迟和缺乏可扩展性。在这项工作中,我们提出了一种智能(单周期多跳异步反复遍历遍历)3D NoC架构,其能够实现高性能集体通信。与现有路径和树组播基于三播的3D Noc相比,建议的高性能智能(HP-SMART)3D NOC达到了65%和31%的延迟改善。与其2D对应物相比,HP-Smart 3D Noc还实现了对消息延迟的显着改进。

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