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Studies of prototype DEPFET sensors for the wide field imager of Athena

机译:雅典娜宽野成像仪的原型DEPFET传感器研究

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The Wide Field Imager of the Athena telescope will combine an excellent spectroscopic performance and high count rate capability with a large field of view. For these purposes, its focal plane consists of two complementary detectors, using DEPFET active pixel sensors. One is the high count rate detector with a small field of view, which has to be operated with a readout speed of 80 μs per frame. In contrast, the large area detector will cover a large field of view and has to be read out with a frame rate ≤ 5 ms. Its sensitive area is covered by four identical active pixel arrays, consisting of 512 × 512 pixels, each. Since a column parallel readout will be used, 512 pixels are connected to one single channel of a readout ASIC. The readout will be accomplished by either sensing a voltage step on the source node or a change of the transistor drain current. The former so-called source follower mode requires long settling times - proportional to the load capacitances - but can cope with local inhomogeneities. Alternatively, the latter so-called drain current mode provides a fast readout - independent to the load capacitance - but implicates a higher sensitivity on local variations of the DEPFETs bias currents. Both modes are implemented in the VERITAS 2.1 readout ASIC and were studied with 64 × 64 pixels arrays. Drain current devices could be operated with significantly smaller settling times but suffer from a slightly increased noise at similar shaping times in comparison to the source follower ones. By using an optimized timing with dedicated settling and shaping times, the devices of both modes feature a comparable spectral performance.
机译:雅典娜望远镜的宽野成像仪将结合出色的光谱性能和高计数率能力,具有大视野。对于这些目的,其焦平面由两个互补探测器组成,使用DEPFET活性像素传感器。一个是具有小视野的高计数速率检测器,必须以每帧为80μs的读出速度操作。相反,大面积检测器将覆盖大的视野,并且必须以帧速率≤5ms读出。其敏感区域由四个相同的活动像素阵列覆盖,包括512×512像素,每个像素。由于将使用列并行读数,因此512像素连接到读出ASIC的一个通道。读出将通过感测源节点上的电压步骤或晶体管漏极电流的变化来实现。前所所谓的源跟随模式需要长时间的沉降时间 - 与负载电容成比例 - 但可以应对局部不均匀性。或者,后者所谓的漏极电流模式提供快速读出 - 独立于负载电容 - 但是暗示对DEPFET偏置电流的局部变型的更高灵敏度。两种模式都在Veritas 2.1读出ASIC中实现,并使用64×64像素阵列进行了研究。漏极电流装置可以用明显更小的沉降时间操作,但与源从动件器相比,在类似的成形时间内遇到略微增加的噪声。通过使用专用沉降和成形时间的优化时序,两种模式的设备都具有相当的光谱性能。

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