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A path-based equivalence checking method for Petri net based models of programs

机译:基于Petri网络型号的基于路径的等价检查方法

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Programs are often subjected to significant optimizing and parallelizing transformations. It is therefore important to model parallel behaviours and formally verify the equivalence of their functionalities. In this work, the untimed PRES+ model (Petri net based Representation of Embedded Systems) encompassing data processing is used to model parallel behaviours. Being value based with inherent scope of capturing parallelism, PRES+ models depict such data dependencies more directly; accordingly, they are likely to be more convenient as the intermediate representations (IRs) of both the source and the transformed codes for translation validation than strictly sequential variable-based IRs like Finite State Machines with Datapath (FSMDs) (which are essentially sequential control data-flow graphs (CDFGs)). In this work, a path based equivalence checking method for PRES+ models is presented.
机译:程序通常经过显着的优化和平行化转换。因此,模拟并行行为并正式验证其功能的等同性是重要的。在这项工作中,包含数据处理的未定义的PRES +模型(嵌入式系统的Petri Net基于嵌入式系统表示)用于模拟并行行为。基于捕获并行性的固有范围的价值,PRES +模型更直接地描绘了这种数据依赖性;因此,它们可能更方便地作为转换验证的源和转换代码的中间表示(IRS),而不是严格顺序的基于变量基IRS,如具有DataPath(FSMDS)的有限状态机(这是基本上是顺序控制数据 - 垃圾图(CDFG))。在这项工作中,提出了一种基于路径的Pres +模型的等价检查方法。

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