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Specification-Driven Automated Conformance Checking for Virtual Prototype and Post-Silicon Designs

机译:虚拟原型和硅片设计的规范驱动自动一致性

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Due to the increasing complexity of System-on-Chip (SoC) design, how to ensure that silicon implementations conform to their high-level specifications is becoming a major challenge. To address this problem, we propose a novel specification-driven conformance checking approach that can automatically identify inconsistencies between different levels of designs. By extending SystemRDL specifications, our approach enables the generation of high-level Formal Device Models (FDMs) that specify access behaviors of interface registers triggered by driver requests. Based on the symbolic execution of the generated FDMs with the same driver requests to virtual/silicon devices, our approach can efficiently check whether the designs of an SoC at different levels exhibit unexpected behaviors that are not modeled in the given specification. Experiments on two industrial network adapters demonstrate the effectiveness of our approach in troubleshooting bugs caused by inconsistencies in both virtual and post-silicon prototypes.
机译:由于片上系统(SOC)设计的复杂性越来越多,如何确保硅实现符合其高级规格正在成为一项重大挑战。为了解决这个问题,我们提出了一种新颖的规范驱动的一致性检查方法,可以自动识别不同级别的设计之间的不一致性。通过扩展SystemRDL规范,我们的方法可以生成高级正式设备模型(FDMS),该模型指定由驱动程序请求触发的接口寄存器的访问行为。基于具有与虚拟/硅设备相同的驱动器请求的生成的FDMS的符号执行,我们的方法可以有效地检查不同级别的SOC的设计是否表现出在给定规范中未建模的意外行为。两个工业网络适配器的实验展示了我们在虚拟和硅原型不一致的错误造成的错误中的效果。

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