Adaptive Tile Parallelization for Fast Video Encoding in HEVC

摘要

As large multimedia providers rely more and more on Cloud resources to perform video coding and transcoding, designing fast and efficient coders that take advantage of parallelization, particularly for the new video standard HEVC, is of paramount importance. Tiles were introduced in HEVC to provide an alternative parallelization granularity compared to the previous standard H.264/AVC. The premise was that with the rectangular tile shapes, spatial correlation between samples could be better exploited compared to slices, leading to increased coding efficiency. While a significant amount of research was done in parallelizing video coding, few works exist on tile parallelization in HEVC. In this paper we tackle the problem of balancing the CPU core load by dynamically adapting tile sizes. It is shown that the proposed adaptive method leads to significant reduction of load imbalances and consequently, achieves a better speedup compared to static, uniform CTU-tile assignment. Furthermore, these gains come at no cost quality wise.