TCAD Simulations of Dual Gate N~+Pocket based Dopingless Tunnel Field Effect Transistor

摘要

In this paper, the 2 D-performance analysis of dual gate N~+ pocket based dopingless tunnel field effect transistor. The N~+ pocket in the proposed devices increases the fabrication complexity i.e., either epitaxial growth in vertical TFET's and ion implantation in the planar TFET's. To succeed this, we are using the idea of charge plasma concept, we propose an inbuilt N+ pocket without need for separate methods of ion implantation etc., The use of N+ pocket in the proposed device primarily reduces the tunneling length, which in turn reduces the tunneling voltage and improves the electrical characteristics of the proposed device. The simulation results of proposed device have lower sub threshold swing (SS) of 41 mV/decade avg. (SS) of 53 mV/decade and good I_(ON)/I_(OFF) ratio of 1.25×10~(11).