Presents a general-purpose simulator of finite state machines (FSM), developed for training purposes. Algorithms, represented graphically as algorithmic state machine charts, can be drawn directly on the computer screen, and directly tested in the state and time domains without the necessity for synthesizing the FSM logic circuits. The simulator facilitates the transition from the pedagogical level of digital design to the professional level, which is characterized by the use of CAD tools. It is currently being used in introductory digital electronics courses for several electronic engineering curricula.
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