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HIGH PERFORMANCE, HIGHLY RELIABLE GATE OXIDE FORMED WITH RAPID THERMAL OXIDATION IN-SITU STEAM GENERATION (ISSG) TECHNIQUE

机译:通过快速热氧化原位蒸汽发生(ISSG)技术制成的高性能,高可靠性门氧化物

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摘要

Gate dielectric thickness in the range of 20 A is needed for devices with an operating voltage of 1.2 V (0.12 μm technology node). The main problems for such thin gate dielectrics are degraded quality, high leakage current and boron penetration for dual gate CMOS devices. This paper is about our new approach to significantly improve gate oxide reliability while the drive current is enhanced by 15-20 % on PMOS devices. 20 A gate oxide was formed under sub-atmospheric pressure with Rapid Thermal Oxidation technique using both oxygen and hydrogen as precursors (In-Situ Steam Generation (ISSG)). Devices were fabricated with Shallow Trench Isolation scheme and poly-silicon/Wsi gate electrodes. Gate oxide reliability was evaluated with Time Dependent Dielectric Breakdown (TDDB). Significant lifetime extension was observed. In order to understand the mechanism of the improvement, SiO_2/Si interfacial structure was analyzed with X-ray Photoelectron Spectroscopy (XPS) while Silicon surface roughness was analyzed with Atomic Force Microscopy (AFM) and High Resolution Transmission Electron Microscopy (HRTEM) techniques. Hydrogen content and bonding structures were analyzed with Fourier Transfer Infrared Spectroscopy (FTIR).
机译:对于工作电压为1.2 V(技术节点为0.12μm)的器件,需要20 A范围内的栅极电介质厚度。这种薄的栅极电介质的主要问题是双栅极CMOS器件的质量下降,高漏电流和硼渗透。本文介绍了我们的新方法,该方法可显着提高栅极氧化物的可靠性,同时在PMOS器件上将驱动电流提高15-20%。 20使用氧和氢作为前体(原位蒸汽生成(ISSG)),通过快速热氧化技术在低于大气压的条件下形成栅极氧化物。用浅沟槽隔离方案和多晶硅/ Wsi栅电极制造器件。栅极氧化物的可靠性通过时变介电击穿(TDDB)进行评估。观察到使用寿命显着延长。为了了解改进的机理,使用X射线光电子能谱(XPS)分析了SiO_2 / Si界面结构,同时使用原子力显微镜(AFM)和高分辨率透射电子显微镜(HRTEM)技术分析了硅表面粗糙度。氢含量和键结构通过傅立叶转移红外光谱法(FTIR)进行分析。

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