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FLEXclusion: Balancing cache capacity and on-chip bandwidth via Flexible Exclusion

机译:Flexclusion:通过灵活排除平衡高速缓存容量和片上带宽

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Exclusive last-level caches (LLCs) reduce memory accesses by effectively utilizing cache capacity. However, they require excessive on-chip bandwidth to support frequent insertions of cache lines on eviction from upper-level caches. Non-inclusive caches, on the other hand, have the advantage of using the on-chip bandwidth more effectively but suffer from a higher miss rate. Traditionally, the decision to use the cache as exclusive or non-inclusive is made at design time. However, the best option for a cache organization depends on application characteristics, such as working set size and the amount of traffic consumed by LLC insertions. This paper proposes FLEXclusion, a design that dynamically selects between exclusion and non-inclusion depending on workload behavior. With FLEXclusion, the cache behaves like an exclusive cache when the application benefits from extra cache capacity, and it acts as a non-inclusive cache when additional cache capacity is not useful, so that it can reduce on-chip bandwidth. FLEXclusion leverages the observation that both non-inclusion and exclusion rely on similar hardware support, so our proposal can be implemented with negligible hardware changes. Our evaluations show that a FLEXclusive cache reduces the on-chip LLC insertion traffic by 72.6% compared to an exclusive design and improves performance by 5.9% compared to a non-inclusive design.
机译:独有的最后一级缓存(LLC)通过有效利用缓存容量来减少内存访问。但是,它们需要过多的片上带宽,以支持频繁插入高速缓存线上的高速缓存线上的高级缓存。另一方面,非包容性缓存具有更有效地使用片上带宽但遭受更高的错过率。传统上,在设计时,在设计时使用缓存作为独家或非包容的决定。但是,缓存组织的最佳选择取决于应用特征,例如工作集大小和LLC插入所消耗的流量量。本文提出了Flexclusion,这是一种动态选择的设计,根据工作负载行为而在排除和非夹杂物之间进行。通过Flexclusion,当应用程序受益于额外高速缓存容量时,缓存表现在独占缓存中,并且当额外的缓存容量无用时,它充当非包含缓存,因此它可以减少片上带宽。 Flexclusion利用了非包含和排除依赖于类似的硬件支持的观察,因此我们的提案可以通过可忽略不计的硬件变化来实现。我们的评估表明,与非包装设计相比,柔性高速缓存将片内LLC插入流量减少72.6%,并通过5.9%提高性能。

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