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A high current efficiency rail-to-rail buffer for low drop-out regulators with load regulation-enhanced

机译:高电流效率轨到轨缓冲器,用于低丢弃调节器,负载调节增强

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A 1.8-V 250-mA CMOS low-dropout regulator (LDO) with a current-efficiency rail-to-rail buffer to enhance load regulation is presented. The proposed buffer provides a push-pull output stage for driving pass device and pushes the parasitic pole far beyond the unity-gain frequency to improve phase margin of the LDO loop response. The proposed LDO has been implemented in a 0.35-μm CMOS process technology and occupies area of 0.735-mm2. The measurement results show that the LDO with the proposed buffer dissipates 40-μA quiescent current and a maximum drop-out voltage of 200-mV at 250-mA output load. The output voltage drop with a 1-μF off chip capacitor for a 250-mA load step is less than 25-mV. The proposed LDO is able to provide excellent agreement between theoretical and measurement results.
机译:提出了一个1.8V 250-MA CMOS低压丢失调节器(LDO),具有电流效率的轨到轨缓冲器,以增强负载调节。 所提出的缓冲器提供用于驱动通过装置的推挽输出级,并将远离单位增益频率的寄生杆推动以改善LDO环响应的相位裕度。 提出的LDO已在0.35 - &#03BC; M CMOS工艺技术中实施,占据了0.735mm2的面积。 测量结果表明,具有所提出的缓冲器的LDO耗散40 - μ静态电流和250 mA输出负载的最大掉落电压为200-mV。 用1 - &#x03bc的输出电压降; 250 mA负载步骤的F切屑电容小于25-mV。 拟议的LDO能够在理论和测量结果之间提供出色的一致性。

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