Active Noise Shaping SAR ADC Based on ISDM with the 5MHz Bandwidth

摘要

This paper reports a hybrid noise shaping (NS) successive-approximation registers (SAR) ADC based on incremental sigma-delta modulator (ISDM). The combination of ISDM and NS-SAR ADC achieves the high signal-to-noise ratio (SNR) with a few extra timing and hardware penalty. The reuse of integrator for both ISDM and NS releases the demands of high-resolution multi-input comparator replaced by only a 2-input one, which also helps suppress the noise from comparator and clock to the top plate of capacitor digital-to-analog converter (CDAC) relatively. With the embedded ISDM, the gain of amplifier used in the finite impulse response (FIR) filter for NS is relaxed remarkably, and wider bandwidth (BW) as well as lower oversampling rate (OSR) is realized compared to those traditional NS-SAR ADCs. The proposed hybrid ADC is designed in 40nm CMOS process with a 1.1V supply. It achieves the Signal-to-Noise Distortion Ratio (SNDR) and the Spurious Free Dynamic Range (SFDR) of 82.4dB and 97.1dBc respectively at 80MS/s, with a signal bandwidth (BW) of 5MHz and a total power consumption of 883uW.