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AXI4LV: Design and Implementation of a Full-Speed AMBA AXI4-Burst DMA Interface for Lab VIEW FPGA

机译:AXI4LV:用于实验室VIEW FPGA的全速AMBA AXI4-Burst DMA接口的设计和实现

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The Advanced Microcontroller Bus Architecture Advanced extensible Interface is a memory mapped protocol intended for internal System on Chip communications. However, there is no mean to directly exchange data between AXI devices and LabVIEW applications. This work proposes a novel and streamlined bridge solution to transfer data directly and effectively from/to an AXI target memory and any LabVIEW FPGA application, essential to integrate AXI-based architectures into PXI FPGA peripheral modules. The block diagram of the proposed IP solution and synthesis results are presented for target programmable devices of interest.
机译:先进的微控制器总线体系结构先进的可扩展接口是一种内存映射协议,旨在用于内部片上系统通信。但是,没有办法在AXI设备和LabVIEW应用程序之间直接交换数据。这项工作提出了一种新颖且简化的桥接解决方案,可以直接有效地从AXI目标存储器和任何LabVIEW FPGA应用程序之间传输数据,这对于将基于AXI的体系结构集成到PXI FPGA外围模块中至关重要。提出了针对感兴趣的目标可编程设备的IP解决方案和综合结果的框图。

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