A Highly Linear Low Power Envelope Detector

摘要

This paper presents a direct voltage detection architecture that can be used for linear envelope detectors. A preamplifier using a common-gate (CG) common-source (CS) circuit topology sends the input modulated signal to a differential output and is coupled to a pair of common source stages. By using the quadratic IV curve of the MOSFETs, the detector can achieve linear operations on the detected envelope signals. The envelope detector was designed using a standard 0.18 μm CMOS process. The simulation result shows the detector can track a 120 MHz modulation signal at cost of 18 mW of static power with a 1.8 V power supply.