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Model-Based Parallelizer for Embedded Control Systems on Single-ISA Heterogeneous Multicore Processors

机译:单ISA异构多核处理器上嵌入式控制系统的基于模型的并行器

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This paper presents a model-based parallelization approach for embedded systems on single instruction set architecture (ISA) heterogeneous multicore processors, wherein the core assignment of Simulink blocks is determined based on the control design constraints and characteristics of single-ISA heterogeneous multicore processors. The proposed method first groups blocks hierarchically and forms tens of top-level clusters that contain blocks of the same attribute. For these clusters, a mixed-integer linear programming (MILP) formulation determines the core assignment solution considering load balancing and minimization of inter-core communication across cores with different performance. Finally, each top-level cluster is assigned to cores on multicore processors based on the core assignment solution from the MILP formulation and expanded to the block level by the block dependency. We evaluate the proposed approach by generating parallel code on a single-ISA heterogeneous multicore processor to determine its effectiveness.
机译:本文针对单指令集架构(ISA)异构多核处理器上的嵌入式系统提出了一种基于模型的并行化方法,其中Simulink块的核心分配是根据控制设计约束和单ISA异构多核处理器的特性确定的。所提出的方法首先对块进行分层分组,并形成数十个包含相同属性的块的顶级群集。对于这些集群,混合整数线性规划(MILP)公式确定了内核分配解决方案,其中考虑了负载均衡以及性能不同的内核之间的内核间通信的最小化。最后,基于MILP公式中的核心分配解决方案,将每个顶级集群分配给多核处理器上的核心,并通过块依赖性将其扩展到块级别。我们通过在单ISA异构多核处理器上生成并行代码来确定其有效性来评估所提出的方法。

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