An unbalanced transformerless vector-sum phase shifter architecture

摘要

This paper presents a novel unbalanced transformerless vector-sum phase shifter architecture. The proposed approach is based on the forming of four signals from the input unbalanced signal by an RC quadrature all-pass filter. These signals are subtracted to obtain a pair of orthogonal signals which are added on the load network of the Gilbert cells with weighted coefficients to form the differential phase shifted signal. The common-mode component of the phase shifted signal is suppressed by the following circuits. The resulting signal is transformed to the single-ended form and amplified. According the proposed architecture 6-bit vector-sum phase shifter has been designed and simulated in 0.18 um CMOS process. The RF part of the circuit consists of an RC quadrature all-pass filter, variable gain amplifiers, a common-mode rejection circuit, an active combiner and a power amplifier. The phase shifter operates in the 3.4???4.2 GHz range. Simulation results show a maximum gain of 3.7 dB with 0.4 dB variation, a maximum phase error and a root-mean-square phase error less than 1.5 degree and 0.7 degree respectively. The current consumption of the RF part is 39.5 mA from a 1.8 V supply voltage.