首页> 外文会议>ASME international technical conference and exhibition on packaging and integration of electronic and photonic microsystems >3D STACKS OF MICROPROCESSORS AND MEMORIES WITH BACKSIDE TWO-PHASE MULTI-MICROCHANNEL COOLER
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3D STACKS OF MICROPROCESSORS AND MEMORIES WITH BACKSIDE TWO-PHASE MULTI-MICROCHANNEL COOLER

机译:背面两相多微通道冷却器的微处理机和存储器的3D堆栈

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For the next generation of high performance computers, the new challenges are to shorten the distance for transporting data (to accelerate the transfer of information) between multi-microprocessors and memories, and to cool these electronic components despite the increased heat flux that results from increased transistor density. Recent technological advances show a tendency for the development of 3D integrated circuit stacked architectures with interlayer cooling (multi-microchannels in the silicon layers). However, huge challenges exist in such design/concept, i.e. flow distribution to hundreds microchannels distributed in the different interlayers, thermo-hydrodynamic and geometrical limitations, manufacturing etc. 3D-ICs with interlayer cooling are still about a decade away, so a viable shorter term goal is 3D stacks with backside cooling, taking advantage of Si layers now able to be thineer down toonly 50 μm thickness.Thus, the present work presents thermo-hydrodynamic simulations for 3D stacks considering only a backside cooler, which simplifies considerably the assembly and guarantees a high level of reliability. In summary, the results showed that this concept is thermally feasible and potentially that interlayer microchannels (between stacks) will not be necessary.
机译:对于下一代高性能计算机,新的挑战是缩短多微处理器和存储器之间的数据传输距离(以加快信息的传输),并且尽管由于增加而产生的热通量增加也要冷却这些电子组件。晶体管密度。最近的技术进步显示出具有层间冷却(硅层中的多个微通道)的3D集成电路堆叠体系结构的发展趋势。然而,在这样的设计/概念中存在巨大的挑战,即流向分布在不同夹层中的数百个微通道的流量分配,热流体动力学和几何限制,制造等。具有夹层冷却的3D-IC距离我们大约还有十年之久,因此可行的方法更短术语目标是利用背面冷却的3D堆叠,利用现在能够更薄至仅50μm厚度的Si层。因此,本工作仅考虑背面冷却器,就可对3D堆叠进行热流体动力学仿真,从而大大简化了组装和保证高度的可靠性。总而言之,结果表明该概念在热方面是可行的,并且可能不需要层间微通道(在堆叠之间)。

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