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FPGA implementation of MIMO-OFDM transceiver

机译:MIMO-OFDM收发器的FPGA实现

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摘要

Orthogonal Frequency Division Multiplexing (OFDM) which is a FDM modulation is a promising methodology for high data rate applications like video streaming. This methodology works effectively for multipath frequency selective channels. Multiple Input and Multiple Output (MIMO) is a wireless technology that uses multiple antennas at the transceiver ends. It increases link throughput and network capacity. The combination of both MIMO and OFDM provides a system that is robust against the frequency-selective fading caused by sever multi-path scattering and narrowband interference. This ongoing evaluation has accelerated the development of System-on-chip (SoC) platform to support the physical layer of these technologies. In this paper, Field Programmable Gate Array (FPGA) implementation of channel coder, its decoder, interleaver and deinterleaver of MIMO-OFDM are discussed. Convolutional encoder of code rate 1/2 is used because of its less complexity and Viterbi decoder is used for decoding. Interleaver and Deinterleaver is used to remove the burst error thus improving the performance.
机译:正交频分复用(OFDM)是一种FDM调制,对于像视频流这样的高数据速率应用来说,是一种很有前途的方法。这种方法对于多径频率选择信道有效。多输入多输出(MIMO)是一种无线技术,在收发器端使用多个天线。它增加了链路吞吐量和网络容量。 MIMO和OFDM的结合提供了一种强大的系统,可抵抗严重的多径散射和窄带干扰导致的频率选择性衰落。正在进行的评估加快了片上系统(SoC)平台的开发,以支持这些技术的物理层。本文讨论了信道编码器的现场可编程门阵列(FPGA)实现,其解码器,MIMO-OFDM的交织器和解交织器。使用码率1/2的卷积编码器,因为它的复杂度较低,而使用维特比解码器进行解码。交织器和解交织器用于消除突发错误,从而提高性能。

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