Design of a real-time acquisition system for the CLIC klystron modulators control loop

摘要

The proof of principle of an acquisition system of ±50 ppm repeatability, 10 V range, real-time delay less than 1.2 μs is presented. The system will be integrated into the digital control loop of a high-voltage modulator under design at ETH Zurich and University of Laval for the new particle accelerator under study at CERN, the Compact LInear Collider (CLIC). Initial specifications are presented and translated into system requirements. Main design choices are discussed and Pspice simulation results are reported to prove that the proposed system meets the demanding requirements.