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Design and Development of FPGA based VMEbus interface controller (VIC) for Computer based IC systems of fast reactors

机译:基于FPGA的VMEbus接口控制器(VIC)的设计和开发,用于基于计算机的快堆I&C系统

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Versa Module Eurocard (VME) backplane bus based architecture has been standardized for Real Time Computer (RTC) based I&C systems of Indian fast reactors. A typical RTC consists of a CPU card and a set of I/O cards. VMEbus based CPU card is currently being used in the computer based I&C systems of FBTR at IGCAR. The CPU card uses a commercial VMEbus Interface controller (VIC), which is now obsolete, to perform the functions of VMEbus system controller, VMEbus master and Interrupt Handler. To solve the part obsolescence problem and support long term maintainability, it has been envisaged to prototype VIC in a Field Programmable Gate Array (FPGA). The specifications of the commercial VIC have been revised to suit the application, retaining only the features essential for the target application. This paper discusses the design, development, verification and testing of customized VIC.
机译:基于Versa Module Eurocard(VME)背板总线的架构已针对印度快速反应堆的基于实时计算机(RTC)的I&C系统进行了标准化。典型的RTC由CPU卡和一组I / O卡组成。 IGCAR的FBTR的基于计算机的I&C系统中目前正在使用基于VMEbus的CPU卡。 CPU卡使用现已淘汰的商用VMEbus接口控制器(VIC)来执行VMEbus系统控制器,VMEbus主站和中断处理程序的功能。为了解决零件报废问题并支持长期可维护性,已经设想在现场可编程门阵列(FPGA)中对VIC进行原型设计。商用VIC的规范已进行了修改以适合该应用程序,仅保留目标应用程序必不可少的功能。本文讨论了定制VIC的设计,开发,验证和测试。

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