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A novel scalable and reconfigurable emulation platform for embedded systems verification

机译:一种用于嵌入式系统验证的新型可扩展和可重构仿真平台

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Modern embedded systems are characterized by a heterogeneous architecture including several modules (e.g., DSPs, memories and mixed-signal IPs) often integrated with one or more microprocessor cores controlling the system functionalities by means of embedded software programs. The verification of such a kind of systems has become a challenge due to their increasing complexity that makes traditional simulation and emulation techniques unaffordable methods for current quality and time-to-market constraints. This paper presents a new platform for the hardware and software verification of modern embedded systems based on a reconfigurable device. The main novelty consists in an infrastructure architecture containing a signal processing IP and a microprocessor core flexibly interfaced with the device under validation, aimed at the overall reduction of the design verification time. It also provides a dynamic interface supporting the software verification of the embedded system microprocessors. The proposed environment is fully scalable and adaptable to the requirements of a general purpose embedded system, enabling advanced verification flows at different phases of design and integration without time expensive interface modification. Experimental and performance analysis on a real industrial case study are reported proving the effectiveness of the proposed solution.
机译:现代嵌入式系统的特征在于异构架构,包括多个模块(例如,DSP,存储器和混合信号IP),通常通过嵌入式软件程序与一个或多个微处理器核心控制系统功能。由于其越来越复杂的复杂性,使传统仿真和仿真技术不适合当前质量和上市时间限制的方法,因此验证了这类系统已经成为挑战。本文为基于可重新配置设备的现代嵌入式系统的硬件和软件验证提供了一种新的平台。主要的新颖性包括在一个基础设施架构中,包含信号处理IP和微处理器核心,微处理器核心与验证的设备灵活地接通,旨在整体减少设计验证时间。它还提供了一种支持嵌入式系统微处理器的软件验证的动态接口。所提出的环境是完全可扩展的,适应通用嵌入式系统的要求,使得在不同阶段的不同阶段的高级验证流,而无需昂贵的接口修改。据报道,实际工业案例研究的实验性和性能分析证明了提出的解决方案的有效性。

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