Flaw Detection by Using Hardware-in-Loop Based on Proteus

摘要

A rapid R&D Process is produced in eddy current detection using hardware-in-loop simulation. Inspired by software and hardware concurrent exploitation method in software engineering, we explore a new topdown design method in Proteus environments. Data acquisition and data-out devices which can work in Proteus environments are designed, including the digital filter and coherent detection procedures for eddy current detection. By putting the spiral development of software engineering into the design process of the hardware projects, which uses Proteus as a system prototype development platform, unifies the gap between field experiment and the software simulation by using hardware-in-loop method and accelerates design schedule. In this way, rapid eddy current detection prototyping can be designed very soon, and it is useful for system-level devices design in eddy current detection. The practice proves that this method can greatly shorten the product development cycle and reduce development cost for system-level devices design in eddy current detection.