PROCESSING STRATEGIES AND RELIABILITY OF 0.4mm PITCH CSPs

摘要

Interest in using fine pitch (0.4mm pitch and below) CSPs has increased greatly in recent years due to the growth of the portable, hand held electronics and due to miniaturization trends in consumer and industrial electronics markets. Other products driving fine pitch package assembly include RF applications and system in a package (SiP) assemblies. This paper will discuss surface mount assembly strategies and subsequent reliability of 0.4mm pitch CSP package assemblies.The data in this paper will highlight a number of significant yield and reliability factors that are affected by the design of the board layout, as well as printing, placement, and reflow processes. Board design recommendations are presented to reduce board trace failures common in drop testing. It will also show how CSP assembly drop reliability can be further improved with simple design changes. A generalized board level design enhancement mechanism presented by T.Y. Tee et al. will be reviewed in the context of the "Rocker Effect" failure mechanism to help explain the benefits of two major design enhancements. For the processing factors, it will be shown that certain design and manufacturing parameters can have a significant effect upon total process defects. Both stencil printing and dip fluxing processes are reviewed for the 0.4mm CSP assembly, with yield and assembly characterization of these two processes to be explained. Finally, material selection and reflow parameters also play an important role in the assembly yield of fine pitch packages and will be reviewed. This paper will lastly focus on the reliability of 0.4mm CSP assemblies including thermal cycle reliability and drop test performance.