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Digital Implementation of Driving Scheme for Synchronous Rectification in LLC Resonant Converter

机译:LLC谐振变换器中同步整流驱动方案的数字实现

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In this paper, a digital implementation of synchronous rectification (SR) driving scheme for LLC resonant converter is proposed. Compared with analog ones, digital implementation could significantly improve efficiency, since it controls dead time more intelligently and precisely. In this LLC resonant converter SR driving scheme, the drain to source voltage of synchronous rectifier on the secondary side is sensed, that is, the paralleled body diode conduction status would be detected. The SR turn-off time is tuned based on the paralleled body diode conduction information. The whole digital tuning system is realized in Cyclone HI FPGA.
机译:本文提出了LLC谐振变换器同步整流(SR)驱动方案的数字实现。与模拟实现相比,数字实现可以显着提高效率,因为它可以更智能,更精确地控制停滞时间。在该LLC谐振转换器SR驱动方案中,感测次级侧同步整流器的漏极至源极电压,即,将检测并联体二极管的导通状态。 SR关断时间基于并联的体二极管导通信息进行调整。整个数字调谐系统在Cyclone HI FPGA中实现。

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