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Investigation of dVDS/dt Controllability on Rg in SWITCH-MOS to Achieve Superior Turn-on Characteristics with Low dVDS/dt

机译:开关MOS中Rg的dVDS / dt可控性研究以低dVDS / dt实现优异的导通特性

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In this study, we investigated dVDS/dt controllability on gate resistance (Rg) in a 1.2 kV SWITCH-MOS. In the case of large Rg, the SWITCH-MOS showed roughly the same dVDS/dt as a conventional SiC trench MOSFET. However, in the case of small Rg, the SWITCH-MOS achieved higher dVDS/dt, suggesting that the SWITCH-MOS could improve the dVDS/dt controllability on Rg. In the SWITCH-MOS, negative dID/dt occurs in the initial phase of the drain-source voltage fall, owing to the fast reverse recovery. Therefore, the SWITCH-MOS has a large gate charging current in the initial phase, resulting in higher dVDS/dt with small Rg. In the case of large $R_{g}$, this negative dID/dt is so small that the SWITCH-MOS shows low dVDS/dt. Hence, the SWITCH-MOS demonstrates excellent dVDS/dt controllability on Rg.
机译:在这项研究中,我们研究了dV DS / dt对栅极电阻的可控制性(R g )在1.2 kV的SWITCH-MOS中。在大R的情况下 g ,SWITCH-MOS的dV大致相同 DS / dt作为传统的SiC沟槽MOSFET。但是,在小R的情况下 g ,SWITCH-MOS的dV更高 DS / dt,表明SWITCH-MOS可以改善dV DS / dt在R上的可控性 g 。在SWITCH-MOS中,负dI D / dt由于快速反向恢复而出现在漏极-源极电压下降的初始阶段。因此,SWITCH-MOS在初始阶段具有较大的栅极充电电流,从而导致更高的dV DS / dt与小R g 。如果$ R_ {g} $大,则此负dI D / dt太小,以至于SWITCH-MOS的dV值低 DS / dt。因此,SWITCH-MOS表现出出色的dV DS / dt在R上的可控性 g

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