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FPGA design for reflective memory network communication technology

机译:FPGA设计反思存储器网络通信技术

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On the hardware platform of Distributed Real-Time Simulation, a communication module based on reflective memory network was realized in FPGA. The module, as an infrastructure, could be integrated with others seamlessly. Information stream inside the module was analyzed. Following the "Store and Forward with FIFO" rules, hardware circuits were well designed, including Host Logic, Memory Logic, and Net Logic. In addition, kernel data structures were defined, and 64bits/32bits PCI bus compatibility problem was mainly solved. Finally, through the delay analysis of the design and experiments in field, the communication delay between two neighboring nodes reaches microsecond level.
机译:在分布式实时仿真的硬件平台上,在FPGA中实现了一种基于反射存储器网络的通信模块。 作为基础架构的模块可以无缝地与他人集成。 分析了模块内的信息流。 在“存储和前进”规则之后,硬件电路设计精良,包括主机逻辑,内存逻辑和网络逻辑。 此外,定义了内核数据结构,主要解决了64位/ 32位PCI总线兼容性问题。 最后,通过延迟分析现场的设计和实验,两个相邻节点之间的通信延迟达到微秒级。

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