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Hardware Design of Lightweight Stream Cipher PUFFIN Algorithm for Anti-cooperation

机译:轻量级流密码PUFFIN反合作算法的硬件设计

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With the development of the Internet of Things (IoT), the application of micro-computing strips, such as RFID chips and wireless sensor networks, has become more and more widespread, bringing great convenience to people's lives. At the same time, how to ensure the security of information has attracted more and more attention. Because of the limited resources of micro-computing devices, lightweight block cipher algorithms that pursue efficiency and ensure security have emerged. The paper proposes to modify the lightweight PUFFIN algorithm in the forwarding engine switch to solve the problem of information security in the switch. The hardware circuit design of the algorithm is optimized, and each module is compiled and implemented. The serial and parallel combination is adopted in the overall implementation of the algorithm, and the simulation is successfully implemented by ModelSim software. The pipeline delay of the de-synchronization plus descrambling module is 8 TCLKs, and the data throughput rate is 100Gbps when entering the pipeline input.
机译:随着物联网(IoT)的发展,诸如RFID芯片和无线传感器网络之类的微计算带的应用越来越广泛,给人们的生活带来了极大的便利。同时,如何确保信息的安全性越来越引起人们的重视。由于微计算设备的资源有限,已经出现了追求效率并确保安全性的轻量级分组密码算法。本文提出对转发引擎交换机中的轻量级PUFFIN算法进行修改,以解决交换机中信息安全的问题。优化了算法的硬件电路设计,并编译并实现了每个模块。该算法的整体实现采用串行和并行相结合的方式,并通过ModelSim软件成功实现了仿真。去同步加解扰模块的流水线延迟为8个TCLK,进入流水线输入时的数据吞吐率为100Gbps。

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