Low Power LFSR for BIST Applications

摘要

Testing is an inevitable process in safety critical applications such as avionics, space research, etc. In those systems, apart from manufacturing test, which is carried out after the chip is fabricated, maintenance testing also to be done in order to ensure that the device functionality remains the same. Digital circuits that are fabricated these days contain Built-in Self Test (BIST) arrangements with in the chip to perform the above said tasks. Since power consumption of the chip is crucial in battery operated electronic systems, reducing power in design and test circuits become mandatory. The proposed approach is allowed power LFSR using three ring oscillators and fuzzy logic concept. It reduces power consumption during test pattern generation and test response analysis processes by replacing the Linear Feedback Shift Register (LFSR) by its low power version. The proposed approach reduces power consumption up to 4.5% by dipping the number of switching activities in the circuit during the testing process.