An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware

摘要

Executing real-time tasks on FPGAs involves interdependent placement and scheduling problems. Most presented approaches model tasks as rectangles and allow for placing tasks anywhere on the FPGA. Such models are, however, not supported by commercial technology and tool flows. We present a new approach for mapping periodic real-time tasks to FPGAs based on micro slots, which are aggregated to reconfigurable slots that can accommodate a task at a time. This model enables us to leverage existing real-time scheduling results, but also poses new problems of reconfigurable slot creation and layout generation and, most importantly, lends itself to a practical realization. We discuss our overall approach, detail heuristics for reconfigurable slot creation and layout generation, and present simulation experiments.