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Comparator Circuits over Finite Bounded Posets

机译:有限边界集上的比较器电路

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Comparator circuit model was originally introduced in (and further studied in) to capture problems which are not known to be P-complete but still not known to admit efficient parallel algorithms. The class CC is the complexity class of problems many-one logspace reducible to the Comparator Circuit Value Problem and we know that NLOG is contained in CC is contained in P. Cook et al showed that CC is also the class of languages decided by polynomial size comparator circuits. We study generalizations of the comparator circuit model that work over fixed finite bounded posets. We observe that there are universal comparator circuits even over arbitrary fixed finite bounded posets. Building on this, we show that general (resp. skew) comparator circuits of polynomial size over fixed finite distributive lattices characterizes CC (resp. LOG). Complementing this, we show that general comparator circuits of polynomial size over arbitrary fixed finite lattices exactly characterizes P and that when the comparator circuit is skew they characterize NLOG. In addition, we show a characterization of the class NP by a family of polynomial sized comparator circuits over fixed finite bounded posets. These results generalize the results in regarding the power of comparator circuits. As an aside, we consider generalizations of Boolean formulae over arbitrary lattices. We show that Spira's theorem can be extended to this setting as well and show that polynomial sized Boolean formulae over finite fixed lattices capture exactly NC~1. Our techniques involve design of comparator circuits and finite posets. We then use known results from lattice theory to show that the posets that we obtain can be embedded into appropriate lattices. Our results gives new methods to establish CC upper bound for problems also indicate potential new approaches towards the problems P vs CC and NLOG vs LOG using lattice theoretic methods.
机译:比较器电路模型最初是引入(并在其中进行了进一步研究)的,以捕获那些未知的问题,尽管这些问题尚不完整,但仍不承认有效的并行算法。 CC类是可简化为比较器电路值问题的一个多对数空间的问题的复杂性类,我们知道CC中包含NLOG包含在P中。Cook等人表明CC也是由多项式大小决定的语言类比较器电路。我们研究比较器电路模型的概括,该模型适用于固定的有限有界坐姿。我们观察到,甚至在任意固定的有限有界坐姿上也存在通用比较器电路。在此基础上,我们证明了在固定有限分布格上具有多项式大小的常规(相对偏斜)比较器电路具有CC(相对逻辑对数)的特征。与此相辅相成,我们证明了在任意固定有限晶格上具有多项式大小的通用比较器电路可以精确地描述P,而当比较器电路倾斜时,它们可以描述NLOG。此外,我们通过固定有限有界坐姿上的多项式大小比较器电路族对NP类进行了表征。这些结果概括了有关比较器电路功率的结果。顺便说一句,我们考虑布尔公式在任意晶格上的推广。我们证明了Spira定理也可以扩展到该设置,并且表明有限固定格上的多项式大小的布尔公式正好捕获了NC〜1。我们的技术涉及比较器电路和有限姿态的设计。然后,我们使用晶格理论的已知结果来表明,我们获得的位姿可以嵌入适当的晶格中。我们的结果提供了建立问题CC上限的新方法,也表明了使用晶格理论方法针对问题P vs CC和NLOG vs LOG的潜在新方法。

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