This paper presents LDSP (i.e., low-duty-cycle synchronization protocol), a design that enables scalable clock synchronization in wireless networks with low-duty-cycle radio operations. LDSP prevents exponential error proliferation of many available solutions, if applied in the low-duty-cycle scenario, by introducing a new mechanism of parallel synchronization that is naturally immune to excessive message delays widely existing in such networks. The key novelty behind LDSP is its separation of clock drift rate estimation from the error polluted global reference time in a unique manner, which helps eliminate compound errors that would otherwise amplify aggressively over the message delay at each hop during time dissemination. With LDSP, the time error is bounded to low-order polynomial growth as O(h√h), where h is the hop distance to the reference node, according to theoretical analysis verified by numerical simulation. To evaluate, LDSP was implemented on two hardware platforms equipped with different driven clock sources and compared with representative synchronization protocols via experiments in both indoor and outdoor environments. Results show that the proposed design is practical, effective, and features significantly improved scalability under real-world conditions.
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