A Low Power 15-Bit Decimator in 0.18um CMOS for Biomedical Applications

摘要

Biomedical devices are often battery operated and require low power consumption. As biomedical devices increase in complexity to include multiple functions such as signal processing and data storage, the constraint on power consumption becomes a larger issue. This paper presents a low power design for a decimator as part of a sigma-delta ADC for biomedical application in a commercial 0.18um CMOS process. To make the design low power, it makes use of a bit-serial architecture, a low supply voltage of 0.9V and a clock rate of 1MHz.