This research investigated advanced filling technology, different from existing technologies, for the purpose of 3D layering on electronic circuits. Filling with molten solder causes a pressure difference between the upper and lower part of the wafer, to overcome surface tension of the through via holes, and then due to pressure difference molten solder is filled into the TSV. The wafer thickness was 100–200μm with holes of diameter 20∼30μm. The TSVs were formed by deep reactive ion etching (DRIE). A wetting layer of Ti/Cu or Au was sputtered on the wall of the TSVs. Due to pressure differences between upper and lower parts, the molten solder filled into the Through Silicon Via (TSV). Vacuum Pressure was between 0.02MPa and 0.08MPa. The filling speed was under 3 seconds, much higher than conventional methods. Cross-sectional micrographs were taken with a field emission second electron microscope (FE-SEM).
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机译：这项研究调查了与现有技术不同的先进填充技术，目的是在电子电路上进行3D分层。用熔融焊料填充会在晶片的上部和下部之间产生压力差，以克服通孔的表面张力，然后由于压力差将熔融焊料填充到TSV中。晶圆厚度为100–200μm，孔直径为20〜30μm。通过深反应离子蚀刻（DRIE）形成TSV。 Ti / Cu或Au的润湿层被溅射在TSV的壁上。由于上部和下部之间的压力差，熔融焊料填充到硅通孔（TSV）中。真空压力在0.02MPa至0.08MPa之间。填充速度在3秒以下，远高于传统方法。用场发射第二电子显微镜（FE-SEM）拍摄横截面显微照片。
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