An Efficiency Charge Pump Circuit with Low Mismatch for PLLS

摘要

In this paper A new high performance charge pump is introduced, Compared with the conventional structure, the proposed circuit has the characteristics of low current mismatch and low current leakage. The circuit is implemented using a 65nm TSMC CMOS process. And simulation result shows the proposed charge pump circuit can be widely used in fully differential low-power and low-voltage Fractional-N PLL.