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A Completely On-Chip Voltage Regulation Technique For Low Power Digital Circuits

机译:低功耗数字电路的完全片上电压调节技术

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This paper describes a completely on-chip voltage regulation technique for locally generating an adaptive low voltage power supply rail from a given higher voltage power supply without requiring any external component. The on-chip regulator, based on delay servoing, primarily comprises of a critical path replica, charge pump and a high performance voltage buffer which is the most critical component of the design. Simulation results in 0.5#mu#m CMOS process demonstrate that the buffer offers a low DC output impedance, a high degree of voltage regulation (output ripple of 12precent of Vdd) and a superior line regulation (upto the maximum clock frequency of 50MHz) even under strongly varying load conditions. The regulator response for a typical worst case load exhibits a maximum voltage fluctuation of 4precent of Vdd with a reasonably fast response time.
机译:本文介绍了一种完全芯片上的电压调节技术,该技术可从给定的高压电源本地生成自适应低压电源轨,而无需任何外部组件。基于延迟伺服的片上稳压器主要包括关键路径副本,电荷泵和高性能电压缓冲器,这是设计中最关键的组件。在0.5#mu#m CMOS工艺中的仿真结果表明,该缓冲器甚至在低直流输出阻抗,高电压调节度(输出纹波为Vdd的12%)和出色的线路调节度(最高50MHz的最大时钟频率)的情况下也是如此。在剧烈变化的负载条件下。对于典型的最坏情况负载,稳压器的响应会在最大的电压波动范围内达到Vdd的4%,并具有相当快的响应时间。

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