Although software pipelining has been proposed as one of the most important loop scheduling methods, simultaneous scheduling and register allocation is less understood and remains an open problem [28]. The objective of this paper is to develop a unified algorithmic framework for concurrent scheduling and register allocation to support time-optimal software pipelining. A key intuition leading to this surprisingly simple formulation and its efficient solution is the association of maximum computation rate of a program graph with its
机译:要“为软件管道多维循环分配寄存器”
机译:带条件分支的循环的改进软件流水线的寄存器分配方法
机译:软件流水线多维循环的寄存器分配
机译:使用0-1整数线性规划公式的软件流水线循环中的寄存器分配和最佳溢出代码调度
机译:软件质量定义,分配和控制的框架。
机译:连接寄存器文件的集群式VLIW架构的优化指令调度和寄存器分配
机译:使用0-1整数线性编程配方注册软件流水线环路中的注册分配和最佳溢出码