A parallelized inverters configuration is presented based on an assembly of load-commutated inverter, a voltage source inverter, and output capacitor for high-power inductive load applications. The system configuration is to install the voltage source inverter with reduced rating and passive capacitor filters in parallel with the load-commutated inverter. In this system, both the voltage source inverter and the capacitor provide the reactive power, and thus, generate leading power factor to accomplish the natural commutation of the load-commutated inverter. As a result, the current loading of the voltage source inverter is greatly reduced, leading to decreased rating and cost of the voltage source inverter. In addition, the induction motor current drawn from this system can be nearly sinusoidal, because the voltage source inverter compensates the harmonic current components of the load-commutated inverter. The detailed analyses and design considerations for the system have been conducted in the paper. The simulation and experimental results have been shown to verify the feasibility of the proposed parallelized inverters configuration.
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