A novel collaborative scheme of test data compression based on fixed-plus-variable-length (FPVL) coding is presented, with which the test data can be compressed efficiently. In this scheme, code words are divided into fixed-length head and variable-length tail. In order to obtain further compression, the highest bit of the tail is reduced from the code words, because all of the highest bits in the tail section of the tail are the same as 1. A special shift counter is also used, which further eases the control circuit. Experimental results of the Mintest fault sets of part of ISCAS-89 benchmark circuits show that the proposed scheme is obviously better than traditional coding methods in the compression ratio and the implementation of decompression, such as Golomb, FDR, VIHC, v9C coding.
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