【24h】

Design of a compact n-bit ADC with serial output

机译:具有串行输出的紧凑型n位ADC的设计

获取原文

摘要

This work introduces a novel general design of n-bit analog to digital converter (ADC). It is constructed from one basic ADC cell that generates a digital output bit when an analog voltage is applied at its input and produces an analog voltage. This analog voltage is fed back and sampled to be used again as an input for the same ADC cell in order to produce the next digital output bit. This operation is repeated until the required n-bit digital output is obtained. A sample circuit realization is presented for the n-bit ADC. Simulation results show that it produces clean digital output when simulated at 5Ksample/sec.
机译:这项工作介绍了一种新颖的n位模数转换器(ADC)的通用设计。它由一个基本的ADC单元构成,当在其输入端施加模拟电压并产生模拟电压时,该ADC单元会产生一个数字输出位。该模拟电压被反馈并采样,以再次用作同一AD​​C单元的输入,以产生下一个数字输出位。重复此操作,直到获得所需的n位数字输出为止。给出了用于n位ADC的示例电路实现。仿真结果表明,当以5Ksample / sec的速度进行仿真时,它将产生干净的数字输出。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号