Impacts of random telegraph noise on the analog properties of FinFET and trigate devices and Widlar current source

摘要

We investigate the impacts of the single charged trap induced Random Telegraph Noise (RTN) on the analog properties of FinFET and Trigate devices. A comprehensive comparative analysis between FinFET and Trigate device is carried out for the trap located along the channel length and fin height direction employing 3D atomistic TCAD simulations, and the resulting impacts on gm, ro, fT and Wildar current source examined. The results indicate that Trigate device, with larger (smaller) fraction of electron current flowing near the bottom (top) region of the fin, suffers larger (smaller) RTN degradation when the trap is located at the bottom (top) region of the fin. As such, the RTN amplitude in Trigate device has broader dispersion and stronger dependence on the location of the trap compared with FinFET device. For trap positioned along the channel length direction, the single trap located near the source region has the largest influence on the output resistance (Δro/ro) when the device operates at saturation region (VD= 1V), because the sensitivity of ID to ΔVD becomes higher as the potential barrier for carrier injection near the source is significantly perturbed. The variability of RTN Δgm/gm under fin Line Edge Roughness (LER) and Work Function Variation (WFV) is examined, and Trigate device is shown to exhibit larger nominal Δgm/gm and larger s(Δgm/gm). The Widlar current source is used as an example to illustrate the impacts of RTN on analog circuit. The combinations of trapping/detrapping in the current source device and mirroring/output device, and the dependence of ΔIout/Iout on their VGS difference are examined. The Trigate device exhibits larger ΔIout/Iout and larger s(ΔIout/Iout), and the di- ference between Trigate and FinFET becomes more significant with decreasing gate over-drive.