Graduate School of Information, Production and Systems, WASEDA UNIVERSITY, 2-7, Hibikino, Wakamatsu-ku, Kitakyushu-shi, 808-0135, Japan;
Graduate School of Information, Production and Systems, WASEDA UNIVERSITY, 2-7, Hibikino, Wakamatsu-ku, Kitakyushu-shi, 808-0135, Japan;
Internet Systems Research Laboratories, NEC Corp.Kawasaki-shi, 211-8666, Japan;
Graduate School of Information, Production and Systems, WASEDA UNIVERSITY, 2-7, Hibikino, Wakamatsu-ku, Kitakyushu-shi, 808-0135, Japan;
Graduate School of Information, Production and Systems, WASEDA UNIVERSITY, 2-7, Hibikino, Wakamatsu-ku, Kitakyushu-shi, 808-0135, Japan;
AES; Power analysis attack; Correlation DPA; SASEBO-G; SASEBO-R;
机译:无源硬件冗余对FPGA中实现的AES密码差分功率分析电阻的影响
机译:基于FPGA的针对相关功率分析攻击的容错AES的综合评估
机译:差分侧通道分析攻击ARIA的FPGA实现
机译:针对AES密码系统的FPGA实现的实用差分功率分析攻击
机译:使用NeuroMemristive硬件缓解对AES的差分功率分析攻击。
机译:无线传感器网络中具有缓冲器/通道感知的联合时延功率折衷分析及其FPGA实现
机译:对ASIC AES实现的功耗分析攻击