Fast, Wafer-Level Detection and Control of Interconnect Reliability

摘要

Many of the technological in the semiconductor industry have led to dramatic increases in device density and performance in conjunction with enhanced circuit reliability. As reliability is improved, the time taken to characterise particular failure modes with traditional test methods is getting substantially longer. Furthermore, semiconductor customers expect low product cost and fast time-to-market. The limits of traditional reliability testing philosophies are being reached and new approaches need to be investigated to enable the next generation of highly reliable products to the tested. This is especially true in the area of IC interconnect, where significant challenges are predicted for the next decade.