Design a Hardware Mechanism to Utilize Multiprocessors on a Uni-processor Operating System

摘要

The multiprocessor architecture for multimedia embedded systems becomes more popular, because of processor design and fabrication evolution. However the interprocessor communication is still an important problem in multiprocessor environments. In this paper, we propose a hardware interprocessor communication mechanism for a multi-core FPGA chip. Although the hardware/software develop tools do not support multi-core design in the target platform, we create a novel design flow to implement the multi-core under Linux with high speed communication mechanism. In the experiment results, the performance has at least 30% speedup when Dhrystone benchmark execute on the Xilinx ML310 platform which is redesign by our mechanism.