Impact of Dynamic Body Floating Effect on Low-Energy Operation of XCT-SOI CMOS Devices with Aim of sub-20-nm Regime

摘要

This paper considers the dynamic and standby power dissipation characteristics of the scaled XCT-SOI MOSFET. Based on this consideration, first, we characterize the low-energy operation of XCT-SOI CMOS circuits; the model proposed here strongly suggests that the 'source potential floating effect (SPFE)' substantially reduces the operation energy dissipation. In addition, this study addresses the reality of sub-20-nm-long gate XCT devices and a scaling scheme to suppress the standby power consumption for future low-energy applications.