Thinking Outside of the Chip

摘要

Before a chip ships in volume, PCB design is often a bottleneck. The PCB is a significant costrnelement of the final product, which drives major time and effort spent on cost reduction.rnTo achieve these savings, the PCB designer must minimize the number of layers while achievingrnoptimal signal and power performance; no easy task given the density of IC pins and the literalrn“rats nest” of connections. The problem is that the IC designer may not consider the PCBrnplacement and breakout patterns and channels resulting in longer design cycles and too manyrnlayers.rnAwareness of the PCB would enable the IC designer to optimize chip I/O & block level planning,rnand the package designer to optimize the PCB interface represented by the package’s pin-out. Atrnthe same time, they can leverage industry standard interfaces such as DDRx and PCIe and theirrncorresponding design constraints. The result would be a “PCB aware” IC that results in fewer PCBrnlayers designed in less time.rnThis paper will outline the requirements for a design environment that promotes IC, package andrnPCB cross team collaboration allowing bi-directional data exchange between the different designrnteams. Given the IC focus of ISPD, we hope to get the IC community thinking “outside of thernchip”, to provide insights into package and PCB design challenges and to identify areas whererncollaboration and further research is needed.