Hot-Carrier Reliability in Low-Temperature N- and P-Channel Poly-Si TFTs for Active-Matrix Liquid-Crystal Displays (AM-LCDS)

摘要

Hot-carrier reliability in n- and p-channel poly-Si TFTs is investigated on the basis of the distribution of electric field and carrier concentration obtained from tow-dimensional device simulation, and experimentally measured gate and substrate current and threshold voltage shift after systematic applied stress. In n-channel TFTs, under strong current saturation stress, degradation is ascribable to acceptor-type interface state generation at the gate oxide/poly-Si front interface and in the grain boundaries near the poly-Si/glass back interface near n-LDD drain. While under weak saturation stress the degradation in shorter stress time is due to electron trapping at gate oxide/poly Si front interface, and, in longer stress time, increases with stress time, which is presumably due to acceptor-type interface state generation at gate oxide/poly-Si front interface throughout almost the whole channel region. In p-channel TFTs, under strong saturation stress, the degradation is dominantly due to trapping of electrons injected into gate oxide at the front interface near drain junction, giving rise to short-channel effect. The degradation saturates with the increase of stress time. Whereas, under weak saturation stress, the degradation is ascribable dominantly due to hole trapping injected into gate oxide at the front interface throughout almost the whole channel region. The degradation increases with stress time for deeper stress gate voltage, which is presumably due to donor-type interface state generation at the gate oxide/poly Si front interface.